1. Field of the Invention
The present invention relates generally to a method and an apparatus for mounting and removing semiconductor devices such as bear chips, flip chip components and other various electronic components connected to a substrate with solder bumps and, more particularly, to a method and an apparatus for mounting and removing electronic components suitable for various processing such as reworking, replacing and repairing bear chips mounted on a resin substrate with the use of solder bumps.
As a mounting technology for bear chips, the C4 (Controlled Collapse Chip Connection) flip chip wiring technology is used and, in this C4 flip chip wiring technology, connecting protruding terminals (micro bumps) are formed with narrowed connection pitches on a LSI (Large Scale Integration) chip or a flip chip component which is mounted on a module substrate with these micro bumps. For bear chips, various processing can be performed, such as mounting, removing, replacing, remounting and the like. The present invention relates to a method and an apparatus for mounting and removing electronic components, which are preferred for mounting electronic components such as the bear chips onto a resin substrate and for various processing such as rework processing, replace processing, repair processing and the like thereof.
2. Description of the Related Art
Conventionally, in rework of a bear chip, a bonding head of a reflow apparatus is positioned to the bear chip mounted on a substrate and the bear chip is detached from the substrate by heating and melting solder with the bonding head. On the substrate after the bear chip is removed, residual solder is heated and removed and the substrate is processed to be in a state equivalent to the state before mounting by performing cleaning processing with a solvent. Then, the bear chip is positioned and fixed at a bear-chip mounting position on the substrate and the bear chip is remounted by heating the entire package (PKG) with a reflow oven for reflow processing.
For this conventional rework, for example, referring to FIGS. 1A to 1C and FIGS. 2A to 2C, FIGS. 1A to 1C show processing for removing a bear chip from a substrate, and FIGS. 2A to 2C show remount processing after the bear chip is removed. As indicated by an arrow a of FIG. 1A, a tool head 8 is positioned and lowered to a bear chip 6 mounted on a substrate 2 with C4 bumps, for example, solder bumps 4 and, as indicated by an arrow b of FIG. 1B, a top surface of the bear chip 6 is contacted with an under surface of the tool head 8, and the solder bumps 4 is heated and melted by the tool head 8 and the like while controlling the pressure thereof. While maintaining this melting state, as indicated by an arrow c of FIG. 1C, the bear head is supported by the tool head 8 and, when the tool head 8 is raised, the bear chip 6 is detached from the substrate and the solder bumps 4 are melted and collapsed on the substrate to become residual solder 10. The residual solder 10 is in a short-circuit state. Therefore, after the residual solder 10 is removed with the use of a jig 12 as shown in FIG. 2A, preliminary solder bumps 14 is formed on the substrate 2 at a mounting position of the bear chip 6 as shown in FIG. 2B, and the bear chip 6 is positioned at the mounting position to be reconnected.
Regarding to such rework of bear chips and mounting technologies using solder bumps, prior patent documents exist, which are Japanese Patent Application Laid-Open Publication Nos. H06(1994)-21147, H10(1998)-294558, H11(1999)-112131, 2001-7157, 2002-57453, 2002-110740 and others.
Japanese Patent Application Laid-Open Publication No. H06(1994)-21147 discloses mounting, removing and remounting of flip chip IC with the use of solder bumps; Japanese Patent Application Laid-Open Publication No. H10(1998)-294558 discloses a rework apparatus for removing semiconductor devices by heating a semiconductor apparatus with the semiconductor devices mounted on a substrate; Japanese Patent Application Laid-Open Publication No. H11(1999)-112131 discloses a method for removing a semiconductor apparatus wherein the semiconductor apparatus is removed by heating and melting solder from a substrate where the semiconductor apparatus has been mounted, and a method for repairing a semiconductor apparatus wherein a semiconductor apparatus is positioned and remounted onto a substrate where the semiconductor apparatus has been removed; Japanese Patent Application Laid-Open Publication No. 2001-7157 discloses repair processing of flip chip mounting; Japanese Patent Application Laid-Open Publication No. 2002-57453 discloses a method for repairing a semiconductor apparatus wherein after a semiconductor apparatus is removed from a substrate by heating the semiconductor apparatus mounted onto the substrate, the semiconductor apparatus is remounted by supplying solder paste for forming preliminary solder, by affixing the semiconductor apparatus onto the preliminary solder and by heating and melting the solder for bonding; and Japanese Patent Application Laid-Open Publication No. 2002-110740 discloses a method and an apparatus for mounting wherein, in a mounting method for lowering a semiconductor apparatus with solder bumps formed on a under surface of a semiconductor device for flip chip bonding on a substrate, a gap between the semiconductor device and the substrate is controlled depending on the height of the semiconductor apparatus.
By the way, in removal of an electronic component in conventional rework processing of various electronic components such as bear chips, pressure control is used for position control of a head unit equipped on a tool. If a bonding portion of a bear chip has narrow gaps, when an error occurs in the position control of the tool, solder may be short-circuited and the residual solder in the short-circuit state must be removed by sufficient cleaning processing before replacing the bear chip. If a bonding portion of a bear chip has narrow gaps, sufficient accuracy is required for the position control of a substrate and the bear chip at the time of mounting in order to enhance reliability of connection.
Although the preliminary-solder processing is used for ensuring connectivity between the substrate and bear chip, thermal stresses are accumulated in the substrate due to the preliminary-solder processing and the reliability of the connection may be reduced.
Also, since the reflow processing of the entire package gives great thermal stresses to the substrate, if a member with limited heat resistance is mounted on the package, reprocessing is difficult and inspection costs are increased for such as the failure analysis of the bear chips at the time of mounting.
These problems cannot be solved by technologies disclosed in the prior patent documents described above.